This is related to the lowering to LLVM, in particular on GPUs, but probably will also apply in other settings.
In the language reference, the MLIR type
index was defined as an unsigned integer value with the size of the natural machine word of the target architecture. The updated Rationale now states that the bitwidth of index is undefined.
I am in favor of the latter, as it allows lowerings to target architectures to choose the most appropriate size for subscripts and size values. On some targets, even though they are 64 Bit platforms, sizes and subscripts for many workloads are confined to a 32 bit range. On some GPUs, using 64-Bit indices furthermore comes with a significant performance overhead.
To support these use cases out of the box, it would be great if one could configure the size of the
index type when lowering to LLVM independently from the size of the machine word. This would simply become an additional parameter to the lowering pass.
The alternative would be to have a special pass that rewrites computations on index values to 32 bit. This cannot be done before the lowering, as many computations are not yet visible at that stage (e.g. index operations). And it is difficult after the lowering if the workload has 64 bit integers that have to remain.
I have quickly prototyped this and currently it is only a few lines of code that need to change. So the main change here is conceptual and to the MLIR design.