I am trying add a new target of having RISC 32 bit configuration. The target specification similar to XCore.
I am following below steps:
1.add the entry of the backend to llvm_root_dir/CMakeLists.txt
2.add the entry to llvm_root_dir/include/llvm/ADT/Triple.h
3.Add the entry to llvm_root_dir/include/llvm/ BinaryFormat/ELF.h
4.add the entry to lib/Support/Triple.cpp
5.Add the directory entry to lib/Target/LLVMBuild.txt
When I build LLVM with this target I am getting error as KeyError
/llvm-project/llvm/utils/llvm-build/llvmbuild/main.py", line 347, in write_library_table
Am I missing any steps while registering target?