See the previous published edition.
Welcome to the eighteenth issue of the MLIR (bi)Weekly, a newsletter (published on Friday) covering developments in MLIR, and related projects in the ecosystem. MLIR (bi)Weekly is brought to you by a collective effort of contributors, we welcome your contributions!
- ARM released a new specification for representing Machine Learning models: TOSA. They are proposing an integration into MLIR.
- ODS gained support for defining new MLIR Types! Reducing the amount of C++ boilerplate to manually define for new types.
- The first patches for the
asyncDialect have landed.
- A new
SymbolUserOpInterfaceclass has been added to allow for properly and efficiently verify references to symbol operations.
- A new
Idempotenttrait has been added to identify operations that satisfy
f(f(x)) = f(x).
- Traits may now define a
foldTraitmethod to hook into an operations fold hook.
- Support for defining Types in ODS
- Generates the
Typeclass with accessors.
- Generates a
TypeStorageclass and its necessary methods (namely construct, hashKey, and
- Allows for defining printers and parsers inline with ODS.
- Generates the
- Compiler support for sparse tensors in MLIR has started:
- A convenience runtime support library for reading Matrix Market Format was added to the mlir-cpu-runner. It is useful for benchmarking, testing, and debugging sparse code (also see discourse presentation); other tensor repositories will follow
- A proposal/design doc with Q4 plans for sparse compiler implementation (see doc posted in the thread MLIR Support for Sparse Tensors).
- A bit more investigation of XLA:CPU matvec performance trying to use software prefetching for larger matrices, but without any significant improvement.
- SPIR-V dialect now supports identified and recursive structs.
- Composite specialization constants are now properly supported.
- A few OpenCL extended ops (exp, fabs, s_abs) are added.
- SPIR-V target environment can represent cooperative matrix configurations now.
- A directory is started to host vector op to SPIR-V op conversions.
- SPIR-V to LLVM conversion supports composite insert/extract now.
In the Ecosystem
CIRCT : Circuit IR Compilers and Tools aka ‘MLIR for hardware’
- The System Verilog dialect gained support for declaring interfaces